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MC74AC273, MC74ACT273 Octal D Flip-Flop
The MC74AC273/74ACT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements.
Features
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20 1
PDIP-20 SUFFIX N CASE 738
* * * * * * * * * *
Ideal Buffer for MOS Microprocessor or Memory Eight Edge-Triggered D Flip-Flops Buffered Common Clock Buffered, Asynchronous Master Reset See MC74AC377 for Clock Enable Version See MC74AC373 for Transparent Latch Version See MC74AC374 for 3-State Version Outputs Source/Sink 24 mA ACT273 Has TTL Compatible Inputs Pb-Free Packages are Available*
VCC 20 Q7 19 D7 18 D6 17 Q6 16 Q5 15 D5 14 D4 13 Q4 12 CP 11
20
SOIC-20WB SUFFIX DW CASE 751D 1 TSSOP-20 SUFFIX DT CASE 948E 1 SOEIAJ-20 SUFFIX M CASE 967 1
20
20
PIN ASSIGNMENT
PIN D0-D7 1 MR 2 Q0 3 D0 4 D1 5 6 7 D2 8 D3 9 Q3 10 GND MR CP Q0-Q7 Q1 Q2 (Top View) FUNCTION Data Inputs Master Reset Clock Pulse Input Data Outputs
Pinout: 20-Lead Packages Conductors
MODE SELECT-FUNCTION TABLE
Operating Mode Reset (Clear) Load 1 Load 0 Inputs MR L H H CP X Dn X H L Outputs Qn L H L
D0 D1 D2 D3 D4 D5 D6 D7 CP MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Logic Symbol ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Clock Transition
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2005
DEVICE MARKING INFORMATION
See general marking information in the device marking section on page 6 of this data sheet.
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December, 2005 - Rev. 6
Publication Order Number: MC74AC273/D
MC74AC273, MC74ACT273
D0 CP D1 D2 D3 D4 D5 D6 D7
D
Q CP RD
D
Q CP RD
D
Q CP RD
D
Q CP RD
D
Q CP RD
D
Q CP RD
D RD
Q CP
D RD
Q CP
MR O0 O1 O2 O3 O4 O5 O6 O7
NOTE: That this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Figure 1. Logic Diagram
MAXIMUM RATINGS
Symbol VCC VIN VOUT IIN IOUT ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Value - 0.5 to + 7.0 - 0.5 to VCC + 0.5 - 0.5 to VCC + 0.5 20 50 50 - 65 to + 150 Unit V V V mA mA mA C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC Vin, Vout Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) VCC @ 3.0 V tr, tf Input Rise and Fall Time (Note 1) AC Devices except Schmitt Inputs Input Rise and Fall Time (Note 2) ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current - High Output Current - Low VCC @ 4.5 V VCC @ 5.5 V tr, tf TJ TA IOH IOL VCC @ 4.5 V VCC @ 5.5 V Parameter AC ACT Min 2.0 4.5 0 - - - - - - -40 - - Typ 5.0 5.0 - 150 40 25 10 8.0 - 25 - - Max 6.0 5.5 VCC - - - - - 140 85 -24 24 ns/V C C mA mA ns/V V V Unit
1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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MC74AC273, MC74ACT273
DC CHARACTERISTICS
74AC Symbol Parameter VCC (V) 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOLD IOHD Maximum Input Leakage Current Minimum Dynamic Output Current 5.5 5.5 5.5 TA = +25C Typ VIH Minimum High Level Input Voltage 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 - - - 0.002 0.001 0.001 - - - - - - 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 0.1 - - 74AC TA = -40C to +85C Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 1.0 75 -75 V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 mA Unit Conditions
VIL
Maximum Low Level Input Voltage
V
VOH
Minimum High Level Output Voltage
V
V V
*VIN = VIL or VIH -12 mA IOH -24 mA -24 mA IOUT = 50 mA
V mA mA
*VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
ICC Maximum Quiescent Supply Current 5.5 - 8.0 80 mA *All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. NOTE: Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
AC CHARACTERISTICS (For Figures and Waveforms - See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC Symbol Parameter VCC* (V) 3.3 5.0 3.3 5.0 3.3 5.0 TA = +25C CL = 50 pF Min fmax tPLH tPHL tPHL Maximum Clock Frequency Propagation Delay Clock to Output Propagation Delay Clock to Output 90 140 4.0 3.0 4.0 3.0 Typ 125 175 7.0 5.5 7.0 5.0 Max - - 12.5 9.0 13.0 10.0 13.0 10.0 74AC TA = -40C to +85C CL = 50 pF Min 75 125 3.0 2.5 3.5 2.5 3.5 2.5 Max - - 14.0 10.0 14.5 11.0 14.0 10.5 Mhz ns ns ns 3-3 3-6 3-6 3-6 Unit Figure No.
Propagation Delay 3.3 4.0 7.0 MR to Output 5.0 3.0 5.0 *Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
AC OPERATING REQUIREMENTS
74AC Symbol Parameter VCC* (V) 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 TA = +25C CL = 50 pF Typ ts th tw tw trec Setup Time, HIGH or LOW Data to CP Hold Time, HIGH or LOW Data to CP Clock Pulse Width HIGH or LOW MR Pulse Width HIGH or LOW 3.5 2.5 -2.0 -1.0 3.5 2.5 2.0 1.5 5.5 4.0 0 1.0 5.5 4.0 5.5 4.0 74AC TA = -40C to +85C CL = 50 pF Guaranteed Minimum 6.0 4.5 0 1.0 6.0 4.5 6.0 4.5 4.5 3.0 ns ns ns ns ns 3-9 3-9 3-6 3-6 3-9 Unit Figure No.
Recovery Time 3.3 1.5 3.5 MR to CP 5.0 1.0 2.0 *Voltage Range 3.3 V is 3.3 V 0.3 V. Voltage Range 5.0 V is 5.0 V 0.5 V.
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MC74AC273, MC74ACT273
DC CHARACTERISTICS
74ACT Symbol Parameter VCC (V) TA = +25C Typ VIH VIL VOH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum Low Level Output Voltage 4.5 5.5 4.5 5.5 IIN DICCT IOLD IOHD Maximum Input Leakage Current Additional Max. ICC/Input Minimum Dynamic Output Current 5.5 5.5 5.5 5.5 1.5 1.5 1.5 1.5 4.49 5.49 - - 0.001 0.001 - - - 0.6 - - 74ACT TA = -40C to +85C Unit Conditions
Guaranteed Limits 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 0.1 - - - 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 1.0 1.5 75 -75 80 V V V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 mA *VIN = VIL or VIH IOH -24 mA -24 mA IOUT = 50 mA *VIN = VIL or VIH 24 mA IOL 24 mA VI = VCC, GND VI = VCC - 2.1 V VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
V
V
V mA mA mA mA
ICC Maximum Quiescent Supply Current 5.5 - 8.0 *All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (For Figures and Waveforms - See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT Symbol Parameter VCC* (V) TA = +25C CL = 50 pF Min fmax tPHL tPLH tPHL Maximum Clock Frequency Propagation Delay Clock to Output Propagation Delay Clock to Output Propagation Delay MR to Output 5.0 5.0 5.0 5.0 125 3.0 3.0 3.0 Typ 200 6.0 6.5 7.0 Max - 10 11 11 74ACT TA = -40C to +85C CL = 50 pF Min 125 2.5 2.5 2.5 Max - 11.0 12.0 11.5 MHz ns ns ns 3-3 3-6 3-6 3-6 Unit Figure No.
*Voltage Range 5.0 V is 5.0 V 0.5 V.
AC OPERATING REQUIREMENTS
74ACT Symbol Parameter VCC* (V) TA = +25C CL = 50 pF Typ ts th tw tw trec Setup Time, HIGH or LOW - Data to CP Hold Time, HIGH or LOW - Data to CP Clock Pulse Width - HIGH or LOW MR Pulse Width - HIGH or LOW Recovery Time - MR to CP 5.0 5.0 5.0 5.0 5.0 3.0 -2.5 2.5 2.5 -1.0 74ACT TA = -40C to +85C CL = 50 pF 5.0 2.0 4.5 4.5 3.0 Unit Figure No.
Guaranteed Minimum 4.5 2.0 4.0 4.0 2.0 ns ns ns ns ns 3-9 3-9 3-6 3-6 3-6
*Voltage Range 5.0 V is 5.0 V 0.5 V.
CAPACITANCE
Symbol CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Value Typ 4.5 50 Unit pF pF Test Conditions VCC = 5.0 V VCC = 5.0 V
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MC74AC273, MC74ACT273
ORDERING INFORMATION
Device MC74AC273N MC74AC273NG MC74ACT273N MC74ACT273NG MC74AC273DW MC74AC273DWG MC74AC273DWR2 MC74AC273DWR2G MC74AC273DTR2 MC74AC273DTR2G MC74ACT273DW MC74ACT273DWG MC74ACT273DWR2 MC74ACT273DWR2G MC74ACT273DTR2 MC74ACT273DTR2G MC74AC273MEL MC74AC273MELG MC74ACT273M MC74ACT273MG MC74ACT273MEL MC74ACT273MELG Package PDIP-20 PDIP-20 (Pb-Free) PDIP-20 PDIP-20 (Pb-Free) SOIC-20WB SOIC-20WB (Pb-Free) SOIC-20WB SOIC-20WB (Pb-Free) TSSOP-20* TSSOP-20* SOIC-20WB SOIC-20WB (Pb-Free) SOIC-20WB SOIC-20WB (Pb-Free) TSSOP-20* TSSOP-20* SOEIAJ-20 SOEIAJ-20 (Pb-Free) SOEIAJ-20 SOEIAJ-20 (Pb-Free) SOEIAJ-20 SOEIAJ-20 (Pb-Free) Shipping 18 Units / Rail 18 Units / Rail 18 Units / Rail 18 Units / Rail 38 Units / Rail 38 Units / Rail 1000 / Tape & Reel 1000 / Tape & Reel 2500 / Tape & Reel 2500 / Tape & Reel 38 Units / Rail 38 Units / Rail 1000 / Tape & Reel 1000 / Tape & Reel 2500 / Tape & Reel 2500 / Tape & Reel 2000 / Tape & Reel 2000 / Tape & Reel 40 Units / Rail 40 Units / Rail 2000 / Tape & Reel 2000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free.
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MC74AC273, MC74ACT273
MARKING DIAGRAMS
PDIP-20
SOIC-20WB 20
TSSOP-20
SOEIAJ-20
20 20 MC74AC273N AWLYYWWG 1 1 AC273 AWLYYWWG
20 AC 273 ALYWG G 1 74AC273 AWLYWWG 1
20 20 MC74ACT273N AWLYYWWG 1 1 ACT273 AWLYYWWG
20 20 ACT 273 ALYWG G 1 74ACT273 AWLYWWG 1
A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location)
PACKAGE DIMENSIONS
PDIP-20 N SUFFIX CASE 738-03 ISSUE E
-A-
20 1 11
B
10
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
C
L
-T-
SEATING PLANE
K M E G F D
20 PL
N J 0.25 (0.010)
M 20 PL
0.25 (0.010) TA
M
M
TB
M
DIM A B C D E F G J K L M N
INCHES MIN MAX 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 BSC 0.050 0.070 0.100 BSC 0.008 0.015 0.110 0.140 0.300 BSC 0_ 15 _ 0.020 0.040
MILLIMETERS MIN MAX 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 BSC 1.27 1.77 2.54 BSC 0.21 0.38 2.80 3.55 7.62 BSC 0_ 15_ 0.51 1.01
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MC74AC273, MC74ACT273
PACKAGE DIMENSIONS
SOIC-20 WB DW SUFFIX CASE 751D-05 ISSUE G
D
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_
A
11 X 45 _
q
H
M
B
M
20
10X
0.25
E
1
10
20X
B 0.25
M
B TA
S
B
S
A
SEATING PLANE
h
18X
e
A1
T
C
TSSOP-20 D5 SUFFIX CASE 948E-02 ISSUE B
20X
L
K REF
M
0.15 (0.006) T U
S
0.10 (0.004)
TU
S
V
S
2X
L/2
20
11
B L
PIN 1 IDENT 1 10
J J1
-U-
N 0.15 (0.006) T U
S
A -V- N F
C D 0.100 (0.004) -T- SEATING
PLANE
G
H
DETAIL E
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IIII IIII IIII
SECTION N-N 0.25 (0.010) M DETAIL E
K K1
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
-W-
DIM A B C D F G H J J1 K K1 L M
MC74AC273, MC74ACT273
PACKAGE DIMENSIONS
SOEIAJ-20 M SUFFIX CASE 967-01 ISSUE A
20
11
LE Q1 M_ L DETAIL P
E HE
1
10
Z D e VIEW P A
c
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.15 0.25 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 0.81 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.006 0.010 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.032
b 0.13 (0.005)
M
A1 0.10 (0.004)
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PUBLICATION ORDERING INFORMATION
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MC74AC273/D

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